Publications
2024
[C70] Faye, Joseph W.; Haggui, Naouel; Kermarrec, Florent; Martin, Kevin J. M.; Bhattacharyya, Shuvra S.; Nezan, Jean-François; Pelcat, Maxime (2024) “Scratchy: A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications”, DASIP Workshop of the HiPEAC Conference, DASIP 2024, Springer.
2023
[J25] Carballo-Hernández, Walther; Pelcat, Maxime; Berry, François (2023) “Automatic CNN Model Partitioning for GPU/FPGA‑based Embedded Heterogeneous Accelerators using Geometric Programming”, Journal of Signal Processing Systems (JSPS), Springer.
[C69] Guillaume, Jeremy; Pelcat, Maxime; Nafkha, Amor; Salvador, Ruben (2023) “Attacking at non-harmonic frequencies in screaming-channel attacks”, Smart Card Research and Advanced Application Conference (CARDIS 2023), Amsterdam, The Netherlands.
[Rp2] Pelcat, Maxime (2023) “GHG emissions of semiconductor manufacturing in 2021”, Research Report ESOS_2023-05_01, https://hal.science/hal-04112708.
[C68] Thu, May Myat; Méndez Real, Maria; Pelcat, Maxime; Besnier, Philippe (2023) “You Only Get One-Shot: Eavesdropping Input Images to Neural Network by Spying SoC-FPGA Internal Buses”, International Conference on Availability, Reliability and Security (ARES 2023), ACM, Benevento, Italy.
[C67] Thu, May Myat; Méndez Real, Maria; Pelcat, Maxime; Besnier, Philippe (2023) “Bus Electrocardiogram: Vulnerability of SoC-FPGA Internal AXI Buses to Electromagnetic Side-Channel Analysis”, International Symposium and Exhibition on Electromagnetic Compatibility (EMC Europe 2023), IEEE, Kraków, Poland.
[J24] Carballo-Hernández, Walther; Pelcat, Maxime; Bhattacharyya, Shuvra S.; Carmona Galán, Ricardo; Berry, François (2023) “Flydeling: Streamlined Performance Models for Hardware Acceleration of CNNs through System Identification”, ACM Transactions on Modeling and Performance Evaluation of Computing Systems (ToMPECS), ACM, 2023.
2022
[C66] Guillaume, Jeremy; Pelcat, Maxime; Nafkha, Amor; Salvador (2022) “Virtual Triggering: a Technique to Segment Cryptographic Processes in Side-Channel Traces”, IEEE Workshop on Signal Processing Systems (SiPS 2022), Rennes, France.
[C65] Ciambra, Pedro; Dardaillon, Mickael; Pelcat, Maxime; Yviquel, Hervé (2022) “Co-optimizing Dataflow Graphs and Actors with MLIR” IEEE Workshop on Signal Processing Systems (SiPS 2022), Rennes, France.
[C64] Desnos, Karol; Bourgoin, Thomas; Dardaillon, Mickael; Sourbier, Nicolas; Gesny, Olivier; Pelcat, Maxime (2022) “Ultra-Fast Machine Learning Inference through C Code Generation for Tangled Program Graphs”, IEEE Workshop on Signal Processing Systems (SiPS 2022), Rennes, France.
[C63] Sourbier, Nicolas; Bonnot, Justine; Gesny, Olivier; Majorczyk, Frédéric; Desnos, Karol; Guyet, Thomas; Pelcat, Maxime (2022) “Imbalanced Classification with TPG Genetic Programming: Impact of Problem Imbalance and Selection Mechanisms”, The Genetic and Evolutionary Computation Conference (GECCO 2022).
[J23] Rubattu, Claudio; Palumbo, Francesca; Bhattacharyya, Shuvra S.; Pelcat, Maxime (2022) “PathTracer: Understanding Response Time of Signal Processing Applications on Heterogeneous MPSoCs”, ACM Transactions on Modeling and Performance Evaluation of Computing Systems (ToMPECS), 2022.
2021
[J22] Sourbier, Nicolas; Desnos, Karol; Guyet, Thomas; Majorczyk, Frédéric; Gesny, Olivier; Pelcat, Maxime (2021) “SECURE-GEGELATI: Always-On Intrusion Detection through GEGELATI Lightweight Tangled Program Graphs”, Journal of Signal Processing Systems (JSPS), Springer.
[C62] Carballo-Hernández, Walther; Pelcat, Maxime; Berry, François (2021) “Why is FPGA-GPU Heterogeneity the Best Option for Embedded Deep Neural Networks?”, SLOHA, DATE Workshop, 2021.
[J21] Payvar, Saman; Pelcat, Maxime; Hämäläinen, Timo D. (2021) “A model of architecture for estimating GPU processing performance and power”, Design Automation for Embedded Systems, Springer.
[C61] Rubattu, Claudio; Palumbo, Francesca; Bhattacharyya, Shuvra S.; Pelcat, Maxime (2021) “PathTracing: Raising the Level of Understanding ofProcessing Latency in Heterogeneous MPSoCs”, RAPIDO, HiPEAC Workshop, Budapest, Hungary.
[C60] Desnos, Karol; Sourbier, Nicolas; Raumer, Pierre-Yves; Gesny, Olivier; Pelcat, Maxime (2021). “GEGELATI: Lightweight Artificial Intelligence through Generic and Evolvable Tangled Program Graphs”, DASIP Conference, Budapest, Hungary, Best Paper.
2020
[C59] Lemarchand, Florian; Findeli, Thomas; Nogues, Erwan; Pelcat, Maxime (2020) “NoiseBreaker: Gradual Image Denoising Guided by Noise Analysis”, IEEE International Workshop on Multimedia Signal Processing (MMSP), Tampere, Finland, 2020.
[J20] Bonnard, Jonathan; Abdelouahab, Kamel; Pelcat, Maxime; Berry, François (2020) “On Building a CNN-based Multi-view Smart Camera for Real-time Object Detection”, Microprocessors and Microsystems (MICPRO), Elsevier.
[C58] (contest participation) Yuan, Shanxin; Timofte Radu; Leonardis, Ales; Slabaugh, Gregory; et al. (2020) “NTIRE 2020 Challenge on Image Demoireing: Methods and Results”, CVPR Workshops, Seattle, USA, 2020.
[J19] Sidaty, Naty; Heulot, Julien; Hamidouche, Wassim; Pelcat, Maxime; Ménard, Daniel (2020) “Software HEVC Video Decoder: Towards an Energy Saving for Mobile Applications”, Multimedia Tools and Applications, Springer.
[C57] Lemarchand, Florian; Fernandes Montesuma, Eduardo; Pelcat, Maxime; Nogues, Erwan (2020) “OpenDenoising: an Extensible Benchmark for Building Comparative Studies of Image Denoisers”, ICASSP 2020, Barcelona, Spain.
[C56] Lemarchand, Florian; Marlin, Cyril; Montreuil, Florent; Nogues, Erwan; Pelcat, Maxime (2020) “Electro-Magnetic Side-Channel Attack Through Learned Denoising and Classification”, ICASSP 2020, Barcelona, Spain. [J18] Civerchia, Federico; Pelcat, Maxime; Maggiani, Luca; Kondepu, Koteswararao; Castoldi, Piero; Valcarenghi, Luca (2020) “Is OpenCL Driven Reconfigurable Hardware Suitable for Virtualising 5G Infrastructure?”, IEEE Transactions on Network and Service Management, IEEE.
2019
[P1] Pnevmatikatos, Dionisios N; Pelcat, Maxime; Jung, Matthias (2019) Embedded Computer Systems: Architectures, Modeling, and Simulation: 19th International Conference, SAMOS 2019, Samos, Greece, July 7-11, 2019, Proceedings (Vol. 11733). Springer.
[J17] Suriano, Leonardo; Arrestier, Florian; Rodriguez, Alfonso; Desnos, Karol; Heulot, Julien; Pelcat, Maxime; de la Torre, Eduardo (2019) “DAMHSE: Programming Heterogeneous MPSoCs with Hardware Acceleration using Dataflow-based Design Space Exploration and Automated Rapid Prototyping”, Microprocessors and Microsystems (MICPRO), Elsevier.
[C55] Fanni, Tiziana; Madronal, Daniel; Rubattu, Claudio; Sau, Carlo; Palumbo, Francesca; Juarez, Eduardo; Pelcat, Maxime; Sanz, Cesar; Raffo, Luigi (2019) “Run-time Performance Monitoring of Heterogenous Hw/Sw Platforms Using PAPI”, FPGA for Software Programmers (FSP), Barcelona, Spain.
[C54] Payvar, Saman; Boutellier, Jani; Morvan, Antoine; Rubattu, Claudio; Pelcat, Maxime (2019) “Extending Architecture Modeling for Signal Processing towards GPUs”, EUSIPCO 2019, Coruna, Spain.
[C53] Palumbo, Francesca; Fanni, Tiziana; Sau, Carlo; Rodriguez, Alfonso; Madronal, Daniel; Desnos, Karol; Morvan, Antoine; Pelcat, Maxime; Rubattu, Claudio;Lazcano, Raquel; Raffo, Luigi; de la Torre, Eduardo; Juarez, Eduardo; Sanz, César Sanz; Sanchez de Rojas, Pablo (2019) “Hardware/Software Self-Adaptation in CPS: the CERBERO Project Approach”, SAMOS Conference, Samos, Greece.
[C52] Honorat, Alexandre; Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François (2019) “Modeling Nested for Loops with Explicit Parallelism in Synchronous DataFlow graphs”, SAMOS Conference, Samos, Greece.
[IC1] Civerchia, Federico; Pelcat, Maxime; Castoldi, Piero; Valcarenghi, Luca (2019) “Exploiting Reconfigurable Computing in 5G: a Case Study of Latency Critical Function”, Invited Paper, IEEE 20th International Conference on High Performance Switching and Routing (HPSR), Xi\'an, China.
[C51] Nogues, Erwan; Mercat, Alexandre; Arrestier, Florian; Pelcat, Maxime; Ménard, Daniel (2019) “Convex Energy Optimization of Streaming Applications for MPSOCS”, ICASSP Conference, Brighton, UK.
2018
[J16] Rubattu, Claudio; Palumbo, Francesca; Sau, Carlo; Salvador, Rubén; Sérot, Jocelyn; Desnos, Karol; Raffo, Luigi; Pelcat, Maxime (2018) “Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators”, IEEE Embedded Systems Letters, IEEE.
[J15] Mercat, Alexandre; Arrestier, Florian; Pelcat, Maxime; Hamidouche, Wassim; Menard, Daniel (2018) “On Predicting the HEVC Intra Quad-Tree Partitioning with Tunable Energy and Rate-Distortion”, Journal of Real-Time Image Processing (JRTIP), Springer.
[C50] Abdelouahab, Kamel; Pelcat, Maxime; Berry, François (2018) “The Challenge of Multi-Operand Adders in CNNs on FPGAs”, SAMOS XVIII Conference, Samos, Greece.
[C49] Arrestier, Florian; Desnos, Karol; Pelcat, Maxime; Heulot, Julien; Juarez, Eduardo; Menard, Daniel (2018) “Delays and States in Dataflow Models of Computation”, SAMOS XVIII Conference, Samos, Greece.
[C48] Mercat, Alexandre; Arrestier, Florian; Pelcat, Maxime; Hamidouche, Wassim; Menard, Daniel (2018) “Machine Learning Based Choice of Characteristics for the One-Shot Determination of the HEVC Intra Coding Tree”, Picture Coding Symposium (PCS), San Francisco, USA.
[Ch3] Pelcat, Maxime (2018) “Models of Architecture for DSP Systems”, chapter in Handbook of Signal Processing Systems, Third Edition, S. S. Bhattacharyya, E. F. Deprettere, R. Leupers , J. Takala, Springer.
[C47] Bonnot, Justine; Desnos, Karol; Pelcat, Maxime; Menard, Daniel (2018) “A Fast and Fuzzy Functional Simulator of Inexact Arithmetic Operators for Approximate Computing Systems”, Great Lakes Symposium on VLSI (GLSVLSI), Chicago, USA.
2017
[J14] Pelcat, Maxime; Mercat, Alexandre; Desnos, Karol; Maggiani, Luca; Liu, Yanzhou; Heulot, Julien; Nezan, Jean-François; Hamidouche, Wassim; Ménard, Daniel; Bhattacharyya, Shuvra S. (2017) “Reproducible Evaluation of System Efficiency with a Model of Architecture: From Theory to Practice”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IEEE.
[J13] Mercat, Alexandre; Bonnot, Justine; Pelcat, Maxime, Desnos, Karol; Hamidouche, Wassim; Menard, Daniel (2017). “Smart search space reduction for approximate computing: A low energy HEVC encoder case study”. Journal of Systems Architecture, 80, 56-67.
[J12] Abdelouahab, Kamel; Pelcat, Maxime; Sérot, Jocelyn; Bourrasset, Cédric; Berry, François (2017) “Tactics to Directly Map CNN graphs on Embedded FPGAs”, IEEE Embedded Systems Letters, IEEE.
[C46] Mercat, Alexandre; Arrestier, Florian; Pelcat, Maxime; Hamidouche, Wassim; Menard, Daniel (2017) “Prediction of Quad-Tree Partitioning for Budgeted Energy HEVC Encoding”, SiPS Conference, Lorient, France.
[C45] Mercat, Alexandre; Bonnot, Justine; Pelcat, Maxime; Hamidouche, Wassim; Menard, Daniel (2017) “Exploiting computation skip to reduce energy consumption by approximate computing, an HEVC encoder case study”, Design, Automation & Test in Europe Conference & Exhibition (DATE), Lausanne, Suisse.
[C44] Sidaty, Naty; Heulot, Julien; Hamidouche, Wassim; Pelcat, Maxime; Ménard, Daniel (2017) “Reducing Computational Complexity in HEVC Decoder for Mobile Energy Saving”, EUSIPCO Conference, Kos island, Greece.
[C43] Abdali, El Mehdi; Berry, François; Pelcat, Maxime; Diguet, Jean-Philippe; Palumbo Francesca (2017) “Exploring the Performance of Partially Reconfigurable Point-to-Point Interconnects”, ReCoSoC Conference, Madrid, Spain.
[C42] Suriano, Leonardo; Rodriguez, Alfonso; Desnos, Karol; Pelcat, Maxime; de La Torre, Eduardo (2017) “Analysis of heterogeneous multi-core multi-HW accelerator based systems designed using PREESM and SDSoC”, ReCoSoC Conference, Madrid, Spain.
[J11] Lazcano, Raquel; Madroñal, Daniel; Salvador, Ruben; Desnos, Karol; Pelcat, Maxime; Guerra, Raúl; Fabelo, Imar; Ortega, Samuel; López, Sebastián; Callicó, Gustavo; Juárez, Eduardo; Sanz, César (2017) “Porting a PCA-based Hyperspectral Image Dimensionality Reduction Algorithm for Brain Cancer Detection on a Manycore Architecture”, Journal of System Architecture, Elsevier.
[J10] Ammar, Manel; Baklouti, Mouna; Pelcat, Maxime; Desnos, Karol; Abid, Mohamed (2017) “Comparing Three Clustering-based Scheduling Methods for Energy-Aware Rapid Design of MP2SoCs”, Journal of Signal Processing Systems (JSPS), Springer.
[J9] Sau, Carlo; Palumbo, Francesca; Pelcat, Maxime; Heulot, Julien; Nogues, Erwan; Ménard, Daniel; Meloni, Paolo; Raffo, Luigi (2017) “Challenging the Best HEVC Fractional Pixel FPGA Interpolators with Reconfigurable and Multi-frequency Approximate Computing”, IEEE Embedded Systems Letters, IEEE.
[Rp3] Pelcat, Maxime; Mercat, Alexandre; Desnos, Karol; Maggiani, Luca; Liu, Yanzhou; Heulot, Julien; Nezan, Jean-François; Hamidouche, Wassim; Ménard, Daniel; Bhattacharyya, Shuvra S. (2017) “Models of Architecture: Application to ESL Model-Based Energy Consumption Estimation”, Technical Report PREESM/2017-02TR01.
[C41] Abdali, El Mehdi; Hanniche, Abderrahmane Walid; Pelcat, Maxime; Diguet, Jean-Philippe; Berry, François (2017) “Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA”. In Proceedings of the 11th International Conference on Distributed Smart Cameras, ACM, Stanford, USA.
[C40] Mercat, Alexandre; Arrestier, Florian; Hamidouche, Wassim; Pelcat, Maxime; Menard, Daniel (2017) “Energy Reduction Opportunities in an HEVC Real-Time Encoder”, ICASSP Conference, New Orleans, USA.
[C39] Mercat, Alexandre; Arrestier, Florian; Hamidouche, Wassim; Pelcat, Maxime; Menard, Daniel (2017) “Constrain the Docile CTUs: an In-Frame Complexity Allocator for HEVC Intra Encoders”, ICASSP Conference, New Orleans, USA.
[C38] Masin, Michael; Palumbo, Francesca; Myrhaug, Hans; de Oliveira Filho, Julio; Pastena, Max; Pelcat, Maxime; Raffo, Luigi; Regazzoni, Francesco; Sanchez, Angel Alvaro; Toffetti, Antonella; de la Torre, Eduardo; Zedda, Katiuscia (2017) “Cross-layer Design of Reconfigurable Cyber-Physical Systems”, DATE Conference, Lausanne, Switzerland.
2016
[C37] Raffin, Erwan; Hamidouche, Wassim; Nogues, Erwan; Pelcat, Maxime; Menard, Daniel (2016) “Scalable HEVC Decoder for Mobile Devices: Trade-offs between Energy Consumption and Quality”, DASIP Conference, Rennes, France, Best paper award.
[C36] Mercat, Alexandre; Hamidouche, Wassim; Pelcat, Maxime; Menard, Daniel (2016) “Estimating Encoding Complexity of a Real-Time Embedded Software HEVC Codec”, DASIP Conference, Rennes, France.
[C35] Lazcano, Raquel; Madroñal, Daniel; Desnos, Karol; Pelcat, Maxime; Guerra, Raúl; López, Sebastián; Juárez, Eduardo; Sanz, César (2016) “Parallelism Exploitation of a Dimensionality Reduction Algorithm Applied to Hyperspectral Images”, DASIP Conference, Rennes, France.
[C34] Abdelouahab, Kamel Eddine; Bourrasset, Cédric; Berry, François; Pelcat, Maxime; Quinton, Jean-Charles; Serot, Jocelyn (2016) “A Holistic Approach for Optimizing DSP Block Utilization of a CNN implementation on FPGA”, ICDSC Conference, Paris, France.
[C33] Abdali, El Mehdi; Pelcat, Maxime; Berry, François; Diguet, Jean-Philippe; Heller, Dominique (2016). “Task clustering approach to optimize the scheduling on a partially dynamically reconfigurable FPGAs for image processing algorithms”. In Proceedings of the 10th International Conference on Distributed Smart Camera, ACM, Paris, France.
[C32] Pelcat, Maxime; Desnos, Karol; Maggiani, Luca; Liu, Yanzhou; Heulot, Julien; Nezan, Jean-Francois; Bhattacharyya, Shuvra S. (2016) “Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems”, SiPS Conference, Dallas, USA
[C31] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-Francois; Aridhi, Slaheddine (2016) “Distributed Memory Allocation Technique for Synchronous Dataflow Graphs”, SiPS Conference, Dallas, USA
[C30] Palumbo, Francesca; Sau, Carlo; Evangelista, Davide; Meloni, Paolo; Pelcat, Maxime; Raffo, Luigi (2016) “Runtime Energy versus Quality Tuning in Motion Compensation Filters for HEVC”, PDeS Conference, Brno, Czech Republic
[C29] Pelcat, Maxime; Bourrasset, Cedric; Maggiani, Luca; Berry, Francois (2016) “Design Productivity of a High Level Synthesis Compiler versus HDL”, SAMOS XVI Conference, Samos, Greece.
[J8] Nogues, Erwan; Menard, Daniel; Pelcat, Maxime (2016) “Algorithmic-level Approximate Computing Applied to Energy Efficient HEVC Decoding”,IEEE Transactions on Emerging Topics in Computing, IEEE.
[J7] Nogues, Erwan; Heulot, Julien; Herrou, Glenn; Robin, Ladislas; Pelcat, Maxime; Menard, Daniel; Raffin, Erwan; Hamidouche, Wassim (2016) “Efficient DVFS for Low Power HEVC Software Decoder”,Journal of Real-Time Image Processing (JRTIP), Springer.
[I1] McAllister, John; O\'Neill, Maire; Pelcat, Maxime (2016) “Guest Editorial: New Frontiers in Signal Processing Applications and Embedded Processing Technologies”, Journal of Signal Processing Systems 84(3): 293-294.
[C28] Nogues, Erwan; Pelcat, Maxime; Menard, Daniel; Mercat, Alexandre (2016) “Energy Efficient Scheduling of Real Time Signal Processing Applications Through Combined DVFS and DPM”, PDP Conference, Heraklion, Greece.
[C27] Ammar, Manel; Baklouti, Mouna; Pelcat, Maxime; Desnos, Karol; Abid, Mohamed (2016) “On Exploiting Energy-Aware Scheduling Algorithms for MDE-based Design Space Exploration of MP2SoC”, PDP Conference, Heraklion, Greece.
[C26] Chavarrias, Miguel; Pescador, Fernando; Garrido, Matías J.; Pelcat, Maxime; Juarez, Eduardo (2016) “Design of Multicore HEVC Decoders Using Actor-based Dataflow Models and OpenMP”, ICCE Conference 2016.
[J6] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François, Aridhi, Slaheddine (2016) “On Memory Reuse Between Inputs and Outputs of Dataflow Actors”, ACM Transactions on Embedded Computing Systems (TECS), ACM.
2015
[J5] Holmbacka, Simon; Nogues, Erwan; Pelcat, Maxime; Lafond, Sébastien; Lilius, Johan; Ménard, Daniel (2015) “Energy-Awareness and Performance Management with Parallel Dataflow Applications”, Journal of Signal Processing Systems (JSPS), Springer.
[Rp2] Pelcat, Maxime; Desnos, Karol; Maggiani, Luca; Liu, Yanzhou; Heulot, Julien; Nezan, Jean-François; Bhattacharyya, Shuvra S. (2015) “Models of Architecture”, Technical Report PREESM/2015-12TR01.
[J4] Raffin, Erwan; Nogues, Erwan; Hamidouche, Wassim; Tomperi, Seppo; Pelcat, Maxime; Menard, Daniel (2015) “Low Power HEVC Software Decoder for Mobile Devices”, Journal of Real-Time Image Processing (JRTIP), Springer.
[C25] Nogues, Erwan; Raffin, Erwan; Pelcat, Maxime; Menard, Daniel (2015) “A modified HEVC decoder for low power decoding”, Computing Frontiers Conference.
[C24] Raffin, Erwan; Hamidouche, Wassim; Nogues, Erwan; Pelcat, Maxime; Menard, Daniel; Tomperi, Seppo (2015) “Energy efficiency of a parallel HEVC software decoder for embedded devices”, Computing Frontiers Conference.
[C23] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François, Aridhi, Slaheddine (2015) “Buffer Merging Technique for Minimizing Memory Footprints of Synchronous Dataflow Specifications”, ICASSP Conference, Brisbane, Australia.
[Ch2] Ammar, Manel; Baklouti, Mouna; Pelcat, Maxime; Desnos, Karol; Abid, Mohamed (2015) “Automatic Generation of S-LAM Descriptions from UML/MARTE for the DSE of Massively Parallel Embedded Systems”, chapter in “Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing”, Springer, 2015.
[C22] Nogues, Erwan; Lacour, Morgan; Raffin, Erwan; Pelcat, Maxime; Menard, Daniel (2015) “Low Power Software HEVC Decoder Demo for Mobile Devices”, ICME Conference, Torino, Italy, Best demo award.
[C21] Nogues, Erwan; Berrada, Romain; Pelcat, Maxime; Menard, Daniel; Raffin, Erwan (2015) “A DVFS Based HEVC Decoder for Energy-efficient Software Implementation on Embedded Processors”, ICME Conference, Torino, Italy.
2014
[J3] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François; Aridhi, Slaheddine (2014) “Memory Analysis and Optimized Allocation of Dataflow Applications on Shared-Memory MPSoCs - In-Depth Study of a Computer Vision Application”, Journal of Signal Processing Systems (JSPS), Springer.
[Rp1] Pelcat, Maxime; Desnos, Karol; Heulot, Julien; Guy, Clément; Nezan, Jean-François; Aridhi, Slaheddine (2014) “Dataflow-Based Rapid Prototyping for Multicore DSP Systems”, Technical Report PREESM/2014-05TR01.
[C20] Heulot, Julien;Pelcat, Maxime; Nezan, Jean-François; Oliva, Yaset; Aridhi, Slaheddine; Bhattacharyya, Shuvra S. (2014) “Just-in-time scheduling techniques for multicore signal processing systems”, GlobalSIP, Atlanta, USA.
[C19] Desnos, Karol; El Assad, Safwan; Arlicot, Aurore; Pelcat, Maxime; Menard, Daniel (2014) “Efficient Multicore Implementation of An Advanced Generator of Discrete Chaotic Sequences”, ICITST Conference, London, UK.
[J2] Zhou, Zheng; Plishker, William; Bhattacharyya, Shuvra S.; Desnos, Karol; Pelcat, Maxime; Nezan, Jean-Francois (2014) “Scheduling of Parallelized Synchronous Dataflow Actors for Multicore Signal Processing”, Journal of Signal Processing Systems (JSPS), Springer.
[C18] Heulot, Julien; Pelcat, Maxime; Desnos, Karol; Nezan, Jean-Francois; Aridhi, Slaheddine (2014) “SPIDER: A Synchronous Parameterized and Interfaced Dataflow-Based RTOS for Multicore DSPs”, EDERC Conference, Milan, Italy.
[C17] Heulot, Julien; Menant, Judicaël; Pelcat, Maxime; Nezan, Jean-Francois; Morin, Luce; Pressigout, Muriel; Aridhi, Slaheddine (2014) “Demonstrating a Dataflow-based RTOS for Heterogeneous MPSoC on a Stereo Matching Application”, DASIP Conference Demo Night, Madrid, Spain.
[C16] Ammar, Manel; Baklouti, Mouna; Pelcat, Maxime; Desnos, Karol; Abid, Mohammed (2014) “MARTE to πSDF transformation for data-intensive applications analysis”, DASIP Conference, Madrid, Spain.
[C15] Holmbacka, Simon; Nogues, Erwan; Pelcat, Maxime; Lafond, Sébastien; Lilius, Johan (2014) “Energy Efficiency and Performance Management of Parallel Dataflow Applications”, DASIP Conference, Madrid, Spain, Best paper award.
[C14] Nogues, Erwan; Holmbacka, Simon; Pelcat, Maxime; Menard, Daniel; Lilius, Johan (2014) “Power-aware HEVC decoding with tunable image quality”, SiPS Conference, Belfast, United Kingdom.
[C13] Pelcat, Maxime; Desnos, Karol; Heulot, Julien; Guy, Clément; Nezan, Jean-François; Aridhi, Slaheddine (2014). “PREESM: A Dataflow-Based Rapid Prototyping Framework for Simplifying Multicore DSP Programming”, EDERC Conference, Milan, Italy, Best demo award.
Book Review [R1] on our book “Physical Layer Multicore Prototyping: A Dataflow-Based Approach for LTE eNodeB” - “Let’s Get Physical” by Grant Martin, IEEE Design & Test, July/August 2014.
2013
[C12] Zhang, Jinglin; Nezan, Jean-François; Pelcat, Maxime; Cousin, Jean-Gabriel(2013). “Real-time GPU-based local stereo matching method”, DASIP Conference, Cagliari, Italy.
[C11] Zhou, Zheng;Desnos, Karol;Pelcat, Maxime;Nezan, Jean-François;Plishker, William;Bhattacharyya, Shuvra S. (2013)”Scheduling of Parallelized Synchronous Dataflow Actors”, SoC 2013 Conference, Tampere, Finland
[C10] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François; Bhattacharyya, Shuvra S.; Aridhi, Slaheddine (2013) “PiMM: Parameterized and Interfaced Dataflow Meta-Model for MPSoCs Runtime Reconfiguration”, SAMOS XIII Conference, Samos, Greece.
[C9] Heulot, Julien; Boutellier, Jani; Pelcat, Maxime; Nezan, Jean-François; Aridhi, Slaheddine (2013) “Applying the Adaptive Hybrid Flow-Shop Scheduling Method to Schedule a 3GPP LTE Physical Layer Algorithm onto Many-Core Digital Signal Processors”, AHS Conference, Torino, Italy.
[C8] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François; Aridhi, Slaheddine (2013) “Pre- and Post-Scheduling Memory Allocation Strategies on MPSoCs”, ESLSyn13 Conference, Austin TX, USA.
[D1] Heulot, Julien; Oliva, Yaset; Pelcat, Maxime; Nezan, Jean-François; Prevotet, Jean-Christophe (2013) “Dataflow-based Adaptive Multicore Execution on a Xilinx ZynqPlatform”, DATE Conference University booth, Grenoble, France.
2012
[C7] Heulot, Julien; Desnos, Karol; Nezan, Jean-François; Pelcat, Maxime; Raulet, Mickaël; Yviquel, Hervé; Lagalaye, Pierre-Laurent; Le Lann, Jean-Christophe (2012) “An Experimental Toolchain Based on High-Level Dataflow Models of Computation For Heterogeneous MPSoC”, DASIP Conference, Karlsruhe, Germany.
[C6] Desnos, Karol; Pelcat, Maxime; Nezan, Jean-François; Aridhi, Slaheddine (2012) “Memory Bounds for the Distributed Execution of a Hierarchical Synchronous Data-Flow Graph”, SAMOS Conference, Samos, Greece.
[B1] Pelcat, Maxime; Aridhi, Slaheddine; Piat, Jonathan; Nezan, Jean-François (2012) “Physical Layer Multicore Prototyping: A Dataflow-Based Approach for LTE eNodeB”, Springer.
[C5] Oliva, Yaset; Pelcat, Maxime; Nezan, Jean-François; Prévotet, Jean-Christophe; Aridhi, Slaheddine (2011) “Building a RTOS for MPSoC Dataflow Programming”, SoC 2011 Conference, Tampere, Finland.
[Ch1] Babel, Marie; Pasteau, François; Strauss, Clément; Pelcat, Maxime; Bédat, Laurent; Blestel, Médéric; Déforges, Olivier (2011)”Preserving data integrity of encoded medical images: the LAR compression framework”, chapter in “Advances in reasoning-based image processing, analysis and intelligent systems: Conventional and intelligent paradigms”, Springer Book Series: “Intelligent Systems Reference Library”, Springer.
2010
[C4] Pelcat, Maxime; Nezan, Jean-François; Aridhi, Slaheddine (2010)”Adaptive multicore scheduling for the LTE uplink”, NASA/ESA AHS 2010 Conference, Anaheim, USA.
[T1] Pelcat, Maxime (2010). Rapid Prototyping and Dataflow-Based Code Generation for the 3GPP LTE eNodeB Physical Layer mapped onto Multi-Core DSPs”, PhD Thesis, INSA de Rennes.
2009
[J1] Pelcat, Maxime; Piat, Jonathan; Wipliez, Matthieu; Aridhi, Slaheddine; Nezan, Jean-François (2009). “An Open Framework for Rapid Prototyping of Signal Processing Applications”, EURASIP Journal on Embedded Systems.
[C3] Piat, Jonathan; Bhattacharyya, Shuvra S.; Pelcat, Maxime; Raulet, Mickaël (2009). “Multi-Core Code Generation From Interface Based Hierarchy”, DASIP Conference, Sophia Antipolis, France.
[C2] Pelcat, Maxime; Nezan, Jean-François; Piat, Jonathan; Croizer, Jérôme; Aridhi, Slaheddine (2009). “A System-Level Architecture Model for Rapid Prototyping of Heterogeneous Multicore Embedded Systems”, DASIP Conference, Sophia Antipolis, France.
[C1] Pelcat, Maxime; Menuet, Pierrick; Aridhi, Slaheddine; Nezan, Jean-François (2009). “Scalable compile-time scheduler for multi-core architectures”, DATE Conference, Nice, France.